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at91_sf.h File Reference


Detailed Description

AT91 peripherals.

 *
 * $Log: at91_sf.h,v $
 * Revision 1.1  2006/07/05 07:45:28  haraldkipp
 * Split on-chip interface definitions.
 *
 *
 * 


Chip Identification Registers

#define SF_CIDR   (SF_BASE + 0x00)
 Chip ID register address.
#define SF_EXID   (SF_BASE + 0x04)
 Chip ID extension register address.
#define SF_VERSION   0x0000001F
 Version number mask.
#define SF_NVPSIZ   0x00000F00
 Masks non-volatile program memory size.
#define SF_NVPSIZ_NONE   0x00000000
 No NV program memory.
#define SF_NVPSIZ_32K   0x00000300
 32 kBytes NV program memory
#define SF_NVPSIZ_64K   0x00000500
 64 kBytes NV program memory
#define SF_NVPSIZ_128K   0x00000700
 128 kBytes NV program memory
#define SF_NVPSIZ_256K   0x00000900
 256 kBytes NV program memory
#define SF_NVDSIZ   0x0000F000
 Masks non-volatile data memory size.
#define SF_NVDSIZ_NONE   0x00000000
 No NV data memory.
#define SF_VDSIZ   0x000F0000
 Masks volatile data memory size.
#define SF_VDSIZ_NONE   0x00000000
 No volatile data memory.
#define SF_VDSIZ_1K   0x00010000
 1 kBytes volatile data memory
#define SF_VDSIZ_2K   0x00020000
 2 kBytes volatile data memory
#define SF_VDSIZ_4K   0x00040000
 4 kBytes volatile data memory
#define SF_VDSIZ_8K   0x00080000
 8 kBytes volatile data memory
#define SF_ARCH   0x0FF00000
 Architecture code mask.
#define SF_ARCH_AT91x40   0x04000000
 AT91x40 architecture.
#define SF_ARCH_AT91x55   0x05500000
 AT91x55 architecture.
#define SF_ARCH_AT91x63   0x06300000
 AT91x63 architecture.
#define SF_NVPTYP   0x70000000
 Masks non-volatile program memory type.
#define SF_NVPTYP_M   0x01000000
 M or F series.
#define SF_NVPTYP_C   0x02000000
 C series.
#define SF_NVPTYP_S   0x03000000
 S series.
#define SF_NVPTYP_R   0x04000000
 R series.
#define SF_EXT   0x80000000
 Extension flag.

Reset Status Flag Register

#define SF_RSR   (SF_BASE + 0x08)
 Reset status register address.
#define SF_EXT_RESET   0x0000006C
 Reset caused by external pin.
#define SF_WD_RESET   0x00000053
 Reset caused by internal watch dog.

Memory Mode Register

#define SF_MMR   (SF_BASE + 0x0C)
 Memory mode register address.
#define SF_RAMWU   0x00000001
 Internal extended RAM write allowed.

Protect Mode Register

#define SF_PMR   (SF_BASE + 0x18)
 Protect mode register address.
#define SF_AIC   0x00000020
 AIC runs in protect mode.


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