AT91
[ARM]

Collaboration diagram for AT91:

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Detailed Description

AT91 peripheral registers.

The AT91 peripherals are connected to the 32-bit wide advanced peripheral bus. All registers are word accessible only.

Modules
	Bus Interface
	External bus interface registers.
	Power Saving
	Power saving registers.
	Interrupt Controller
	Advanced interrupt controller registers.
	Parallel I/O
	Parallel I/O controller registers.
	Watchdog Registers
	Watchdog timer registers.
	Watchdog Functions
	AT91 on-chip watchdog timer.
	Special Function
	Special function registers.
	USART
	Universal synchronous / asynchronous receiver / transmitter registers.
	Timer/Counter
	Timer / Counter registers.
Defines
#define	IRQ_ENTRY()
	Interrupt entry.
#define	IRQ_EXIT()
	Interrupt exit.
#define	FIQ_ENTRY()
	Fast interrupt entry.
#define	FIQ_EXIT()
	Fast interrupt exit.

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Define Documentation

#define IRQ_ENTRY (   )

Value: asm volatile("sub lr, lr,#4" "\n\t" /* Adjust LR */ \ "stmfd sp!,{r0-r12,lr}" "\n\t" /* Save registers on IRQ stack. */ \ "mrs r1, spsr" "\n\t" /* Save SPSR */ \ "stmfd sp!,{r1}" "\n\t") Interrupt entry.

#define IRQ_EXIT (   )

Value: asm volatile("ldmfd sp!, {r1}" "\n\t" /* Restore SPSR */ \ "msr spsr_c, r1" "\n\t" /* */ \ "ldr r0, =0xFFFFF000" "\n\t" /* End of interrupt. */ \ "str r0, [r0, #0x130]" "\n\t" /* */ \ "ldmfd sp!, {r0-r12, pc}^" "\n\t") Interrupt exit.

#define FIQ_ENTRY (   )

Value: asm volatile("sub lr, lr,#4" "\n\t" /* Adjust LR */ \ "stmfd sp!,{r0-r7,lr}" "\n\t" /* Save registers on IRQ stack. */ \ "mrs r1, spsr" "\n\t" /* Save SPSR */ \ "stmfd sp!,{r1}" "\n\t") Fast interrupt entry.

#define FIQ_EXIT (   )

Value: asm volatile("ldmfd sp!, {r1}" "\n\t" /* Restore SPSR */ \ "msr spsr_c, r1" "\n\t" /* */ \ "ldr r0, =0xFFFFF000" "\n\t" /* End of interrupt. */ \ "str r0, [r0, #0x130]" "\n\t" /* */ \ "ldmfd sp!, {r0-r7, pc}^" "\n\t") Fast interrupt exit.

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